Previously, I was director and Distinguished Member of Technical Staff at Micron Technology.  Micron is a manufacturer of DRAM and NAND memory devices.  I was brought on to lead a team in a new paradigm of massively parallel computing that would take advantage of computing in memory and enjoy the power and cost advantage over all other forms of compute.  I am especially interested in its application to machine learning, computer vision, imaging, and big data analytics.   My former work was the principal architect for Hewlett Packard LaserJet R&D labs.  I specialize in deeply embedded systems, heterogeneous multicore processing, high performance imaging, and operating system internals.   My work has been successfully deployed in over 69 HP imaging products to date.  I graduated in 1994 with a BS in computer science and a physics minor from Wisconsin.  While working I obtained a MS in computer engineering and a post graduate Engineers Degree in electrical engineering.  I also am an active member of IEEE, IEEE Computer Society and the ACM.  My graduate work involved designing heterogeneous multicore SOCs and associated discrete event simulations.  I have also worked on nanoscale fabrication and synthesis of field effect devices using carbon nanotube spindts.  Other graduate work involved the analysis of heavy tailed distributions in ethernet traffic.